The frequency counter contains two modules. One component is a hardware counter, that counts reference and input clock signals. This is implemented in a MAXII CPLD EPM670 (half unused) or EPM240 (exact fit). The CPLD implements a slave i2c interface. The other component is a PIC 16F87X MC that communicates with the CPLD via i2c interface to start the measurement and read the data. The data from CPLD contains the measured frequency count fc, and reference frenquency count rc. The measured frenquency is calculated by the MC via fixed point arithmetic. fx = fxtal * fc / rc where the fxtal is the xtal frequency of the CPLD, that is used for rc. The MC also drives the 7 segment display, calibration swithes and stores calibration data in EEPROM. (This part is not yet implemented) For CPLD programming, the MAXII Micro Kit is used from terasic, by soldering a JTAG header to it. The PIC is programmed in Windows by Akidzuki PIC programmer, using the main.hex file. You need in linux: gputils gpsim - testing quartus web edition iverilog - testing gmake Gaspar Sinai Tokyo 2010-04-24